| PART |
Description |
Maker |
| XC3020 XC3064 XC3042L XC3064L XC3030 XC3100 XC3090 |
XC3000 Logic Cell Array Families
|
http://
Xilinx, Inc.
|
| XC2018-70PC84CI |
Logic Cell Array
|
Xilinx, Inc.
|
| GAL16V8D-20QPI GAL16V8D-20QJI GAL16V8D-7LP GAL16V8 |
Aluminum Snap-In Capacitor; Capacitance: 2700uF; Voltage: 160V; Case Size: 30x50 mm; Packaging: Bulk
High Performance E2CMOS PLD Generic Array Logic EE PLD, 25 ns, PQCC20
High Performance E2CMOS PLD Generic Array Logic EE PLD, 3.5 ns, PQCC20
High Performance E2CMOS PLD Generic Array Logic EE PLD, 7.5 ns, PDIP20
High Performance E2CMOS PLD Generic Array Logic EE PLD, 15 ns, PDIP20
High Performance E2CMOS PLD Generic Array Logic EE PLD, 7.5 ns, PDSO20
High Performance E2CMOS PLD Generic Array Logic EE PLD, 25 ns, PDIP20
High Performance E2CMOS PLD Generic Array Logic EE PLD, 15 ns, PQCC20
IC,MICROCONTROLLER,8-BIT,68HC08 CPU,CMOS,DIP,8PIN,PLASTIC RoHS Compliant: No
|
Lattice Semiconductor Corporation
Lattice Semiconductor, Corp.
|
| HER301 HER303 HER302 |
28000 GATE 3.3 VOLT LOGIC CELL ARRAY - NOT RECOMMENDED for NEW DESIGN
3.0 AMP HIGH EFFICIENCY RECTIFIERS 3.0放大器高效整流二极管
|
Bytes
|
| XC4062XL-09BG560C XC4062XL-09BG432C XC4036XL-09BG3 |
62000 GATE 3.3 VOLT LOGIC CELL ARRAY - NOT RECOMMENDED for NEW DESIGN FPGA, 2304 CLBS, 40000 GATES, 217 MHz, PBGA560
62000 GATE 3.3 VOLT LOGIC CELL ARRAY - NOT RECOMMENDED for NEW DESIGN FPGA, 2304 CLBS, 40000 GATES, 217 MHz, PBGA432
FPGA, 1296 CLBS, 22000 GATES, 217 MHz, PBGA352
|
Xilinx, Inc.
XILINX INC
|
| XC3090L XC3000L XC3020L XC3030L XC3042L XC3064L |
Part of the ZERO family of 3.3 V FPGAs
XC3000L Low Voltage Logic Cell Array Family
|
XILINX[Xilinx, Inc]
|
| MAX3.00A EPM3032ALC44-10 EPM3032ALC44-4 EPM3032ALC |
Programmable logic , 128 macrocells, 8 logic array blocks, 96 I/O pins, 7ns
Programmable logic , 128 macrocells, 8 logic array blocks, 96 I/O pins, 5ns
Programmable logic , 128 macrocells, 8 logic array blocks, 96 I/O pins, 10ns
Programmable logic , 64 macrocells, 4 logic array blocks, 66 I/O pins, 7ns
Programmable logic , 64 macrocells, 4 logic array blocks, 66 I/O pins, 4ns
Programmable logic , 64 macrocells, 4 logic array blocks, 66 I/O pins, 10ns
Programmable logic , 32 macrocells, 2 logic array blocks, 34 I/O pins, 7ns
Programmable logic , 32 macrocells, 2 logic array blocks, 34 I/O pins, 4ns
Programmable logic , 32 macrocells, 2 logic array blocks, 34 I/O pins, 10ns
Programmable Logic Device Family
|
Altera Corporation
|
| XC2S100-5FG256C XC2S100-5FG256I XC2S100 XC2S15-5VQ |
Spartan-II FPGA Family Data Sheet
30000 SYSTEM GATE 2.5 VOLT LOGIC CELL AR - NOT RECOMMENDED for NEW DESIGN FPGA, 216 CLBS, 30000 GATES, 263 MHz, PQFP144
100000 SYSTEM GATE 2.5 VOLT LOGIC CELL A - NOT RECOMMENDED for NEW DESIGN FPGA, 600 CLBS, 100000 GATES, 263 MHz, PBGA256
150000 SYSTEM GATE 2.5 VOLT LOGIC CELL A - NOT RECOMMENDED for NEW DESIGN FPGA, 864 CLBS, 150000 GATES, 263 MHz, PBGA456
200000 SYSTEM GATE 2.5 VOLT LOGIC CELL A - NOT RECOMMENDED for NEW DESIGN FPGA, 1176 CLBS, 200000 GATES, 263 MHz, PBGA256
200000 SYSTEM GATE 2.5 VOLT LOGIC CELL A - NOT RECOMMENDED for NEW DESIGN FPGA, 1176 CLBS, 200000 GATES, 263 MHz, PBGA456
100000 SYSTEM GATE 2.5 VOLT LOGIC CELL A - NOT RECOMMENDED for NEW DESIGN FPGA, 600 CLBS, 100000 GATES, 263 MHz, PQFP144
30000 SYSTEM GATE 2.5 VOLT LOGIC CELL AR - NOT RECOMMENDED for NEW DESIGN FPGA, 216 CLBS, 30000 GATES, 263 MHz, PQFP100
150 000 SYSTEM GATE 2.5 VOLT FPGA (IQ AU - NOT RECOMMENDED for NEW DESIGN
15000 SYSTEM GATE 2.5 VOLT LOGIC CELL AR - NOT RECOMMENDED for NEW DESIGN
50000 SYSTEM GATE 2.5 VOLT LOGIC CELL AR - NOT RECOMMENDED for NEW DESIGN
Spartan-II FPGA Family
Second generation ASIC replacement technology
|
Xilinx, Inc.
XILINX INC
|
| HIP2060 HIP2060AS1 HIP2060AS2 HIP2060AS3 |
60V/ 10A Half Bridge Power MOSFET Array
60V, 10A Half Bridge Power MOSFET Array
20000 SYSTEM GATE 3.3 VOLT LOGIC CELL AR - NOT RECOMMENDED for NEW DESIGN 10 A, 60 V, 0.15 ohm, 2 CHANNEL, N-CHANNEL, Si, POWER, MOSFET
|
Intersil Corporation
Intersil, Corp.
|
| PAL20L4-7DC PAL20L4-7JC PAL20L4-7PC PAL20L6-7DC PA |
24-pin TTL Programmable Array Logic 24针的TTL可编程阵列逻辑
24-pin TTL Programmable Array Logic OT PLD, 25 ns, PDIP24
24-pin TTL Programmable Array Logic OT PLD, 20 ns, PDIP24
24-pin TTL Programmable Array Logic OT PLD, 35 ns, PDIP24
24-pin TTL Programmable Array Logic OT PLD, 25 ns, CDIP24
24-pin TTL Programmable Array Logic OT PLD, 20 ns, CDIP24
24-pin TTL Programmable Array Logic OT PLD, 20 ns, PQCC28
24-pin TTL Programmable Array Logic OT PLD, 10 ns, CDIP24
24-pin TTL Programmable Array Logic OT PLD, 18 ns, PDIP24
24-pin TTL Programmable Array Logic OT PLD, 15 ns, CDIP24
24-pin TTL Programmable Array Logic OT PLD, 35 ns, PQCC28
|
Advanced Micro Devices, Inc.
|
| CS91 |
Standard cell array
|
FUJITSU[Fujitsu Media Devices Limited]
|
|
